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The purpose of this standard is to provide a pinout standard for dual-die 32-bit logic devices offered in a 96- and 144-ball grid array package for uniformity, multiplicity of sources, elimination of confusion, ease of device specification, and ease use. This standard defines device output for 32-bit wide buffer, driver and transceiver functions. This pinout specifically applies to the conversion of DIP-packaged 16-bit logic devices to LFBGA-packaged dual-die 32-bit logic devices.
Author | EIA |
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Editor | EIA |
Document type | Standard |
Format | File |
ICS | 31.220.01 : Electromechanical components in general
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Number of pages | 10 |
Year | 1990 |
Document history | |
Country | USA |
Keyword | EIA 75;75;EIA JESD75 |