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This standard establishes a 54 Ball Grid Array pinout for 16, 18 and 20-bit standard logic devices that are currently being produced in 48 and 56 Pin SSOP and TSSOP packages. The 54 Ball Grid Array Package is organized as a 6 x 9 array with balls on a .8mm x .8mm grid pitch.
Author | EIA |
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Editor | EIA |
Document type | Standard |
Format | File |
ICS | 31.220.01 : Electromechanical components in general
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Number of pages | 10 |
Year | 2001 |
Document history | |
Country | USA |
Keyword | EIA JESD 75;EIA 75;EIA 75.1;75;EIA JESD75-1 |