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This publication applies to the application of integrated circuits and their associated packages in end use designs. It summarizes the methodology of thermal derating and the suitability of such methodologies.
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 33.020 : Telecommunications in general
|
| Number of pages | 18 |
| Year | 2004 |
| Document history | |
| Country | USA |
| Keyword | EIA 149;149;EIA JEP149 |