Cart
0
Product
Products
(empty)
No products
To be determined
Shipping
$0.00
Total
Product successfully added to your shopping cart
Quantity
Total
There are 0 items in your cart.
There is 1 item in your cart.
Total products
Total shipping
To be determined
Total
Reduced price!
View larger
View larger
More info
This standard defines the dc and ac single-ended (data) and differential (clock) operating conditions, I/O impedance, and the termination and calibration scheme for 1.5 V Pseudo Open Drain I/Os. The 1.5 V Pseudo Open Drain interface, also known as POD15, is primarily used to communicate with GDDR4 and GDDR5 SGRAM devices. Item 135.01
| Author | EIA |
|---|---|
| Editor | EIA |
| Document type | Standard |
| Format | File |
| ICS | 35.200 : Interface and interconnection equipment
|
| Number of pages | 20 |
| Replace | EIA JESD 8-20 (2006-12) |
| Year | 2009 |
| Document history | EIA JESD 8-20A (2009-10) |
| Country | USA |
| Keyword | EIA JESD 8;EIA 8;EIA 8.20A;8;EIA JESD8-20A |