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This document defines the GDDR5X SGRAM memory standard, including features, device operation, electrical charactersitics, timings, signal pin assignments and package. The purpose of this standard is to define the minimum set of requirements for JEDEC standard compatible 4 Gb through 16 Gb x32 GDDR5X SGRAM devices. System designs based on the required aspects of this standard will be supported by all GDDR5X SGRAM vendors providing JEDEC standard compatible devices. Some aspects of the GDDR5X standard such as AC timings were not standardized. Some features are optional and therefore may vary among vendors. In all cases, vendor data sheets should be consulted for specifics. This standard was created based on the GDDR5 SGRAM standard (JESD212). Each aspect of the changes were considered and balloted. The accumulation of these ballots were then incorporated to prepare this GDDR5X SGRAM standard.
Author | EIA |
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Editor | EIA |
Document type | Standard |
Format | File |
ICS | 35.220.99 : Other data storage devices
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Number of pages | 160 |
Replace | EIA JESD 232 (2015-11) |
Year | 2016 |
Document history | EIA JESD 232A (2016-08) |
Country | USA |
Keyword | EIA 232A;232A;EIA JESD232A |