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EIA JEP 143D:2019

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EIA JEP 143D:2019

Solid-State Reliability Assessment and Qualification Methodologies

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This publication applies to all integrated circuits and their associated packages. The document summarizes the suite of reliability documents and publications available. These documents address reliability qualification, reliability stress testing, and reliability modeling. The purpose of this publication is to provide an overview of some of the most commonly used systems and test methods historically performed by manufacturers to assess and qualify the reliability of solid-state products. The appropriate references to existing and proposed JEDEC or joint standards and publications are cited. This document is also intended to provide an educational background and overview of some of the technical and economic factors associated with assessing and qualifying microcircuit reliability.

Author EIA
Editor EIA
Document type Standard
Format File
ICS 31.020 : Electronic components in general
33.020 : Telecommunications in general
Number of pages 37
Replace EIA JEP 143C:2012
Year 2019
Document history EIA JEP 143C (2012-07)
Country USA
Keyword EIA 143C;143C;EIA JEP143C