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EIA JESD 22-B109B:2014

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EIA JESD 22-B109B:2014

Flip Chip Tensile Pull

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This test method is applicable to flip chip die after the die and substrate solder joint is formed, but prior to application of underfill or other materials that increase the apparent bond strength. It should be used to assess the consistency and quality of the chip join process and solder joint integrity across a given flip chip die. This method covers both Pb and Pb-free solder bumps. NOTE Considering that this is a destructive test, it may be not suitable for qualification or process development where medium to high volume sampling might be necessary. In manufacturing, this test can be used to compare to original baseline results.

Author EIA
Editor EIA
Document type Standard
Format File
ICS 31.220.01 : Electromechanical components in general
Number of pages 16
Replace EIA JESD 22-B109A (2009-01)
Year 2014
Document history EIA JESD 22-B109B (2014-07)
Country USA
Keyword EIA JESD 22;EIA 22;EIA 22.B109B;22;EIA JESD22-B109B